Software Application Engineer (m/f/d)
Dortmund
Vollzeit
ELMOS Semiconductor
… PCB design, in-vehicle networking protocols (LIN/CAN/CANFD/ Ethernet), FPGA design and validation a plus knowledge of functional safety, ISO26262 … responsible for application software life cycle development, test, verification, validation and maintenance responsible for definition, validation and … in-vehicle networking protocols (LIN/CAN/CANFD/ Ethernet), FPGA design and validation a plus knowledge of functional safety, ISO26262 processes and cyber …Engineer StellenangeboteFPGA Verification & Validation Engineer (f/m/d)
Heidelberg
Vollzeit
Quest Global
… in the testing of an aerospace data manager device and is seeking FPGA UVM Verification Engineers. This Engineer will be joining the existing … in the testing of an aerospace data manager device and is seeking FPGA UVM Verification Engineers. This Engineer will be joining the existing team who is … data manager device and is seeking FPGA UVM Verification Engineers. This Engineer will be joining the existing team who is establishing the UVM (Universal …Fpga Verification Engineer StellenangeboteCustom Silicon Drivers Lead/Architect (m/f/d)
München
Vollzeit
Apple
… Driving the development of emulation platform with discrete design or FPGA Providing IC specific and broad electrical engineering support to camera … development, including vendor selection. Reviewing and providing vendor verification plan/results. Reviewing and providing guidance internal validation … verification plan/results. Reviewing and providing guidance internal validation plan/results. Driving the development of emulation platform with discrete …Fpga Validation Stellenangebote
OneSat Digital Payloads - VHDL systems engineer (d/f/m)
Ottobrunn
Vollzeit
Airbus
… VHDL systems engineer (d/f/m) - Airbus Defence and Space is looking for a FPGA Design Engineer for Telecom & Navigation Applications (d/f/m) You will … applications in FPGA/MPSoc platforms Perform simulations and FPGA verification against the requirements Coordinate a FPGA design team for the development … Job Description: OneSat Digital Payloads - VHDL systems engineer (d/f/m) - Airbus Defence and Space is looking for a FPGA Design engineer …Fpga Validation Engineer Stellenangebote
Research Associate (m/f/d) – FPGA and Embedded Development for Quantum Applications in Dresden
Dresden
Vollzeit
Fraunhofer-Institut für Integrierte Schaltungen IIS
… Verilog or SystemVerilog and verification/ simulation Strong experience in FPGA design flow, including troubleshooting and performance optimization of … Excellent skills in designing with VHDL, Verilog or SystemVerilog and verification/ simulation Strong experience in FPGA design flow, including … What you bring along Master‘s degree (or higher) in electrical engineering, information systems engineering, computer science, or a related field …Verification Engineer StellenangeboteFPGA- / Embedded-Software Engineer
Berlin
Home Office
greateyes GmbH
… to strengthen our 10-person international development team in the area of FPGA design and hardware-related firmware and software development. Ihr … C++ programming, among other things for the integration of peripheral ICs Verification and error analysis using functional simulation and using hardware …Validation EngineerCustom Silicon Drivers Lead/Architect (IR) - Camera Hardware (m/f/d)
München
Vollzeit
Apple
… of emulation platform with simulation models, discrete design or FPGA-based solutions. Providing IC-specific and broad electrical engineering … the entire development cycle. Reviewing and providing guidance for vendor verification plan/results. Reviewing and providing guidance for internal validation … verification plan/results. Reviewing and providing guidance for internal validation plan/results. Driving the development of emulation platform with …Fpga Validation Engineer StellenangeboteASIC Design Engineer
München
Vollzeit
INTEL
… than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor … including clock domain crossing (CDC) analysis. Experience in Design verification (DV) using standard simulators e.g. VCS, QuestaSim, NCSim. Experience in … Static Timing Analysis (using Prime Time) Bachelor's Degree in Electrical engineering, Computer Engineering or related field Synopsys Design Constraints for …Verification Validation Engineer